Toshiba Weds 3D NAND and TSV: Up to 1 TB 3D TLC Chips with 1066 MT/s I/O Incoming

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Anandtech published Toshiba Weds 3D NAND and TSV: Up to 1 TB 3D TLC Chips with 1066 MT/s I/O Incoming

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Toshiba on Wednesday introduced its first BiCS 3D TLC NAND flash chips with 512 GB and 1 TB capacities. . The new ICs stack 8 or 16 3D NAND devices using through silicon vias (TSVs) and are currently among the highest capacity non-volatile memory stacks available in the industry. Commercial products powered by the 512 GB and 1 TB packages are expected to hit the market in 2018, with an initial market focus on high-end enterprise SSDs

Stacking NAND devices to build high capacity flash memory ICs has been used for years to maximize the capacities and performance of SSDs and other solid state storage devices. In many cases, NAND makers use wire-bonding technique to stack multiple memory devices, but it makes packages larger and requires a lot of power for reliable operation. However in more recent years, Toshiba has adopted TSV techniques previously used for ASIC and DRAM devices to stack its NAND ICs, which has enabled it to shrink size of its NAND packages and reduce their power consumption.
 Toshiba Weds 3D NAND and TSV: Up to 1 TB 3D TLC Chips with 1066 MT/s I/O Incoming @ Anandtech