POWER5 Performance Brief
Posted by: Newsfactory on: 08/02/2004 09:56 PM [ Print | 0 comment(s) ] · 1376 views
Ace's Hardware have thrown up their look at IBM's POWER5 processor!
A new processor has appeared at the top of the SPECmine Top 20 for SPECfp2000: IBM's new dual-core, dual-thread POWER5. IBM has published a variety of benchmark results for its new POWER5-based systems: the 2-way p5 520, 4-way p5 550, and 16-way p5-570. The results are quite impressive thanks to a number of improvements over POWER4 to the core and cache/memory subsystem. All levels of the cache/memory heirarchy have been improved.
The L1 cache associativity has been doubled (direct-mapped L1-I and 2-way set-assoc. L1-D in POWER4, now 2-way L1-I and 4-way L1-D). The shared L2 cache has been increased to 1.9 MB (from 1.44 MB). Each dual-core chip now features a 36 MB external L3 cache with on-chip L3 tags and reduced latency.
POWER5 Performance Brief
A new processor has appeared at the top of the SPECmine Top 20 for SPECfp2000: IBM's new dual-core, dual-thread POWER5. IBM has published a variety of benchmark results for its new POWER5-based systems: the 2-way p5 520, 4-way p5 550, and 16-way p5-570. The results are quite impressive thanks to a number of improvements over POWER4 to the core and cache/memory subsystem. All levels of the cache/memory heirarchy have been improved.
The L1 cache associativity has been doubled (direct-mapped L1-I and 2-way set-assoc. L1-D in POWER4, now 2-way L1-I and 4-way L1-D). The shared L2 cache has been increased to 1.9 MB (from 1.44 MB). Each dual-core chip now features a 36 MB external L3 cache with on-chip L3 tags and reduced latency.
POWER5 Performance Brief
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