Imagination Technologies Group , a developer of multimedia and graphics processor technology and cores available for license, has dropped development of its Series-4 generation of the Power-VR graphics acceleration architecture and is instead speeding up development of the Series-5 architecture, and planning for first implementations in 2003. Series-4 development was stopped when STM Microelectronics backed away from the market. When ITG brought us KYRO I and II chips with (Series-3) Hercules in front they were quite successful. However this is proof of life from another possible contestant for future graphic market shares. Read more...



According to John Metcalfe, vice president of business development at Imagination, Series-5 architecture would be based on a primary processing pipeline and a series of hardware accelerators that can be optionally switched in and out to render graphics. "As well as class-leading functionality, there will be some unique features enabled by tile-based rendering," said Metcalfe. Tile-based rendering is the approach Imagination has taken since 1996, when as VideoLogic, the company introduced its first series graphics chips. Tile-based rendering has advantages in terms of reducing image-processing complexity, according to Imagination. He added that the Series-5 architecture would debut in 2003 in a 0.13-micron process technology. Source: EE Times

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